* source ADDER M_U0_U5_Q5 U0_G3_0_1_H U0_U5_N00028 0 0 NMOS + L=1.6u + W=3.2u M_U0_U5_Q4 U0_G3_0_1_H U0_U5_N00028 VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U5_Q2 U0_U5_N00028 U0_I4O_H_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_U5_Q1 U0_U5_N00028 U0_G3O_H_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_U5_Q3 U0_U5_N00028 CLK VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UGPK_5_Q1 U0_U0_G6_INV_OUT A6_H U0_U0_UGPK_5_N00098 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_5_Q3 U0_U0_UGPK_5_N00098 B6_H 0 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_5_Q6 U0_U0_UGPK_5_N00105 B6_L 0 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_5_Q5 U0_U0_K6_INV_OUT A6_L U0_U0_UGPK_5_N00105 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_5_Q7 U0_U0_G6_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UGPK_5_Q8 U0_U0_P6_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UGPK_5_Q9 U0_U0_K6_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UGPK_5_Q2 U0_U0_P6_INV_OUT A6_L U0_U0_UGPK_5_N00098 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_5_Q4 U0_U0_P6_INV_OUT A6_H U0_U0_UGPK_5_N00105 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_6_Q1 U0_U0_G7_INV_OUT A7_H U0_U0_UGPK_6_N00098 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_6_Q3 U0_U0_UGPK_6_N00098 B7_H 0 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_6_Q6 U0_U0_UGPK_6_N00105 B7_L 0 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_6_Q5 U0_U0_K7_INV_OUT A7_L U0_U0_UGPK_6_N00105 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_6_Q7 U0_U0_G7_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UGPK_6_Q8 U0_U0_P7_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UGPK_6_Q9 U0_U0_K7_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UGPK_6_Q2 U0_U0_P7_INV_OUT A7_L U0_U0_UGPK_6_N00098 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_6_Q4 U0_U0_P7_INV_OUT A7_H U0_U0_UGPK_6_N00105 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_7_Q1 U0_U0_G8_INV_OUT A8_H U0_U0_UGPK_7_N00098 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_7_Q3 U0_U0_UGPK_7_N00098 B8_H 0 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_7_Q6 U0_U0_UGPK_7_N00105 B8_L 0 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_7_Q5 U0_U0_K8_INV_OUT A8_L U0_U0_UGPK_7_N00105 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_7_Q7 U0_U0_G8_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UGPK_7_Q8 U0_U0_P8_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UGPK_7_Q9 U0_U0_K8_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UGPK_7_Q2 U0_U0_P8_INV_OUT A8_L U0_U0_UGPK_7_N00098 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_7_Q4 U0_U0_P8_INV_OUT A8_H U0_U0_UGPK_7_N00105 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGINV_Q1 U0_G1O_S U0_U0_G1_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UGINV_Q2 U0_G1O_S U0_U0_G1_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UPINV_Q1 U0_P1O_S U0_U0_P1_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UPINV_Q2 U0_P1O_S U0_U0_P1_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UKINV_Q1 U0_K1O_S U0_U0_K1_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UKINV_Q2 U0_K1O_S U0_U0_K1_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UPINV_1_Q1 U0_P2O_S U0_U0_P2_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UPINV_1_Q2 U0_P2O_S U0_U0_P2_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UKINV_1_Q1 U0_K2O_S U0_U0_K2_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UKINV_1_Q2 U0_K2O_S U0_U0_K2_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGINV_1_Q1 U0_G2O_S U0_U0_G2_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UGINV_1_Q2 U0_G2O_S U0_U0_G2_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UPINV_2_Q1 U0_P3O_S U0_U0_P3_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UPINV_2_Q2 U0_P3O_S U0_U0_P3_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UKINV_2_Q1 U0_K3O_S U0_U0_K3_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UKINV_2_Q2 U0_K3O_S U0_U0_K3_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGINV_2_Q1 U0_G3O_S U0_U0_G3_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UGINV_2_Q2 U0_G3O_S U0_U0_G3_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UPINV_3_Q1 U0_P4O_S U0_U0_P4_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UPINV_3_Q2 U0_P4O_S U0_U0_P4_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UKINV_3_Q1 U0_K4O_S U0_U0_K4_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UKINV_3_Q2 U0_K4O_S U0_U0_K4_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_Q1 U0_U0_G1_INV_OUT A1_H U0_U0_UGPK_N00098 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_Q3 U0_U0_UGPK_N00098 B1_H 0 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_Q6 U0_U0_UGPK_N00105 B1_L 0 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_Q5 U0_U0_K1_INV_OUT A1_L U0_U0_UGPK_N00105 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_Q7 U0_U0_G1_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UGPK_Q8 U0_U0_P1_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UGPK_Q9 U0_U0_K1_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UGPK_Q2 U0_U0_P1_INV_OUT A1_L U0_U0_UGPK_N00098 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_Q4 U0_U0_P1_INV_OUT A1_H U0_U0_UGPK_N00105 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGINV_3_Q1 U0_G4O_S U0_U0_G4_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UGINV_3_Q2 U0_G4O_S U0_U0_G4_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UPINV_4_Q1 U0_P5O_S U0_U0_P5_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UPINV_4_Q2 U0_P5O_S U0_U0_P5_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UKINV_4_Q1 U0_K5O_S U0_U0_K5_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UKINV_4_Q2 U0_K5O_S U0_U0_K5_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGINV_4_Q1 U0_G5O_S U0_U0_G5_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UGINV_4_Q2 U0_G5O_S U0_U0_G5_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UPINV_5_Q1 U0_P6O_S U0_U0_P6_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UPINV_5_Q2 U0_P6O_S U0_U0_P6_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UKINV_5_Q1 U0_K6O_S U0_U0_K6_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UKINV_5_Q2 U0_K6O_S U0_U0_K6_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGINV_5_Q1 U0_G6O_S U0_U0_G6_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UGINV_5_Q2 U0_G6O_S U0_U0_G6_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_1_Q1 U0_U0_G2_INV_OUT A2_H U0_U0_UGPK_1_N00098 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_1_Q3 U0_U0_UGPK_1_N00098 B2_H 0 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_1_Q6 U0_U0_UGPK_1_N00105 B2_L 0 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_1_Q5 U0_U0_K2_INV_OUT A2_L U0_U0_UGPK_1_N00105 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_1_Q7 U0_U0_G2_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UGPK_1_Q8 U0_U0_P2_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UGPK_1_Q9 U0_U0_K2_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UGPK_1_Q2 U0_U0_P2_INV_OUT A2_L U0_U0_UGPK_1_N00098 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_1_Q4 U0_U0_P2_INV_OUT A2_H U0_U0_UGPK_1_N00105 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UPINV_6_Q1 U0_P7O_S U0_U0_P7_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UPINV_6_Q2 U0_P7O_S U0_U0_P7_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UKINV_6_Q1 U0_K7O_S U0_U0_K7_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UKINV_6_Q2 U0_K7O_S U0_U0_K7_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGINV_6_Q1 U0_G7O_S U0_U0_G7_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UGINV_6_Q2 U0_G7O_S U0_U0_G7_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UPINV_7_Q1 U0_P8O_S U0_U0_P8_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UPINV_7_Q2 U0_P8O_S U0_U0_P8_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UKINV_7_Q1 U0_K8O_S U0_U0_K8_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UKINV_7_Q2 U0_K8O_S U0_U0_K8_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGINV_7_Q1 U0_G8O_S U0_U0_G8_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UGINV_7_Q2 U0_G8O_S U0_U0_G8_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_2_Q1 U0_U0_G3_INV_OUT A3_H U0_U0_UGPK_2_N00098 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_2_Q3 U0_U0_UGPK_2_N00098 B3_H 0 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_2_Q6 U0_U0_UGPK_2_N00105 B3_L 0 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_2_Q5 U0_U0_K3_INV_OUT A3_L U0_U0_UGPK_2_N00105 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_2_Q7 U0_U0_G3_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UGPK_2_Q8 U0_U0_P3_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UGPK_2_Q9 U0_U0_K3_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UGPK_2_Q2 U0_U0_P3_INV_OUT A3_L U0_U0_UGPK_2_N00098 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_2_Q4 U0_U0_P3_INV_OUT A3_H U0_U0_UGPK_2_N00105 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_3_Q1 U0_U0_G4_INV_OUT A4_H U0_U0_UGPK_3_N00098 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_3_Q3 U0_U0_UGPK_3_N00098 B4_H 0 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_3_Q6 U0_U0_UGPK_3_N00105 B4_L 0 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_3_Q5 U0_U0_K4_INV_OUT A4_L U0_U0_UGPK_3_N00105 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_3_Q7 U0_U0_G4_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UGPK_3_Q8 U0_U0_P4_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UGPK_3_Q9 U0_U0_K4_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UGPK_3_Q2 U0_U0_P4_INV_OUT A4_L U0_U0_UGPK_3_N00098 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_3_Q4 U0_U0_P4_INV_OUT A4_H U0_U0_UGPK_3_N00105 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_4_Q1 U0_U0_G5_INV_OUT A5_H U0_U0_UGPK_4_N00098 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_4_Q3 U0_U0_UGPK_4_N00098 B5_H 0 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_4_Q6 U0_U0_UGPK_4_N00105 B5_L 0 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_4_Q5 U0_U0_K5_INV_OUT A5_L U0_U0_UGPK_4_N00105 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_4_Q7 U0_U0_G5_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UGPK_4_Q8 U0_U0_P5_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UGPK_4_Q9 U0_U0_K5_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U0_UGPK_4_Q2 U0_U0_P5_INV_OUT A5_L U0_U0_UGPK_4_N00098 0 NMOS + L=1.6u + W=3.2u M_U0_U0_UGPK_4_Q4 U0_U0_P5_INV_OUT A5_H U0_U0_UGPK_4_N00105 0 NMOS + L=1.6u + W=3.2u M_U0_U3_1_Q8 U0_U3_1_N03502 A3_L U0_U3_1_N03532 0 NMOS + L=1.6u + W=3.2u M_U0_U3_1_Q2 U0_U3_1_N03502 B3_L U0_U3_1_N03532 0 NMOS + L=1.6u + W=3.2u M_U0_U3_1_Q1 U0_U3_1_N03532 B2_L 0 0 NMOS + L=1.6u + W=3.2u M_U0_U3_1_Q7 U0_U3_1_N03532 A2_L 0 0 NMOS + L=1.6u + W=3.2u M_U0_U3_1_Q13 U0_U3_1_N03500 CLK VDD 5 PMOS + L=1.6u + W=9.6u M_U0_U3_1_Q16 U0_U3_1_N03502 CLK VDD 5 PMOS + L=1.6u + W=9.6u M_U0_U3_1_Q4 U0_I4O_L_S U0_U3_1_N03502 0 0 NMOS + L=1.6u + W=3.2u M_U0_U3_1_Q12 U0_I4O_L_S U0_U3_1_N03502 U0_U3_1_N03508 5 PMOS + L=1.6u + W=6.4u M_U0_U3_1_Q6 U0_I4O_L_S U0_U3_1_N03500 0 0 NMOS + L=1.6u + W=3.2u M_U0_U3_1_Q14 U0_I4O_L_S U0_U3_1_N03500 U0_U3_1_N03510 5 PMOS + L=1.6u + W=6.4u M_U0_U3_1_Q15 U0_U3_1_N03508 U0_U3_1_N03500 VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U3_1_Q11 U0_U3_1_N03510 U0_U3_1_N03502 VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U3_1_Q20 U0_U3_1_N03500 U0_I4O_L_S VDD 5 PMOS + L=1.6u + W=3.2u M_U0_U3_1_Q21 U0_U3_1_N03502 U0_I4O_L_S VDD 5 PMOS + L=1.6u + W=3.2u M_U0_U3_1_Q3 U0_U3_1_N03500 A1_L U0_U3_1_N03522 0 NMOS + L=1.6u + W=3.2u M_U0_U3_1_Q9 U0_U3_1_N03522 CIN_L 0 0 NMOS + L=1.6u + W=3.2u M_U0_U3_1_Q5 U0_U3_1_N03500 B1_L U0_U3_1_N03522 0 NMOS + L=1.6u + W=3.2u M_U0_U3_1_Q10 U0_U3_1_N03522 CIN_L 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_4_Q23 U0_USUM_4_N00246 S_4B_H VDD 5 PMOS + L=1.6u + W=2u M_U0_USUM_4_Q21 S_4B_H U0_USUM_4_N00246 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_4_Q20 S_4B_H U0_USUM_4_N00246 VDD 5 PMOS + L=1.6u + W=6.4u M_U0_USUM_4_Q18 S_4B_L U0_USUM_4_N00243 VDD 5 PMOS + L=1.6u + W=6.4u M_U0_USUM_4_Q19 S_4B_L U0_USUM_4_N00243 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_4_Q4 U0_USUM_4_N00243 CIN_H U0_USUM_4_N00016 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_4_Q8 U0_USUM_4_N00016 U0_G4_0_1_L_O_S U0_USUM_4_N00156 0 NMOS + + L=1.6u + W=3.2u M_U0_USUM_4_Q15 U0_USUM_4_N00016 U0_G4_0_1_H_O_S U0_USUM_4_N00365 0 + NMOS + L=1.6u + W=3.2u M_U0_USUM_4_Q16 U0_USUM_4_N00243 CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_USUM_4_Q17 U0_USUM_4_N00246 CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_USUM_4_Q10 U0_USUM_4_N00156 U0_K5O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_4_Q6 U0_USUM_4_N00156 U0_G5O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_4_Q9 U0_USUM_4_N00042 U0_G4_0_0_L_O_S U0_USUM_4_N00156 0 NMOS + + L=1.6u + W=3.2u M_U0_USUM_4_Q5 U0_USUM_4_N00365 U0_P5O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_4_Q2 U0_USUM_4_N00243 CIN_L U0_USUM_4_N00042 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_4_Q13 U0_USUM_4_N00042 U0_G4_0_0_H_O_S U0_USUM_4_N00365 0 + NMOS + L=1.6u + W=3.2u M_U0_USUM_4_Q7 U0_USUM_4_N00064 U0_G4_0_1_H_O_S U0_USUM_4_N00156 0 NMOS + + L=1.6u + W=3.2u M_U0_USUM_4_Q3 U0_USUM_4_N00246 CIN_H U0_USUM_4_N00064 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_4_Q14 U0_USUM_4_N00064 U0_G4_0_1_L_O_S U0_USUM_4_N00365 0 + NMOS + L=1.6u + W=3.2u M_U0_USUM_4_Q11 U0_USUM_4_N00092 U0_G4_0_0_H_O_S U0_USUM_4_N00156 0 + NMOS + L=1.6u + W=3.2u M_U0_USUM_4_Q22 U0_USUM_4_N00243 S_4B_L VDD 5 PMOS + L=1.6u + W=2u M_U0_USUM_4_Q1 U0_USUM_4_N00246 CIN_L U0_USUM_4_N00092 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_4_Q12 U0_USUM_4_N00092 U0_G4_0_0_L_O_S U0_USUM_4_N00365 0 + NMOS + L=1.6u + W=3.2u M_U0_U1_Q8 U0_U1_N00079 A1_H U0_U1_N037282 0 NMOS + L=1.6u + W=3.2u M_U0_U1_Q20 U0_U1_N037321 B4_H 0 0 NMOS + L=1.6u + W=3.2u M_U0_U1_Q6 U0_U1_N00090 A2_H U0_U1_N00079 0 NMOS + L=1.6u + W=3.2u M_U0_U1_Q19 U0_U1_N00265 A4_H U0_U1_N037321 0 NMOS + L=1.6u + W=3.2u M_U0_U1_Q7 U0_U1_N00090 B2_H U0_U1_N00079 0 NMOS + L=1.6u + W=3.2u M_U0_U1_Q5 U0_U1_N00073 B2_H 0 0 NMOS + L=1.6u + W=3.2u M_U0_U1_Q18 U0_U1_N00265 CLK VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U1_Q4 U0_U1_N00090 A2_H U0_U1_N00073 0 NMOS + L=1.6u + W=3.2u M_U0_U1_Q3 U0_U1_N00069 B3_H 0 0 NMOS + L=1.6u + W=3.2u M_U0_U1_Q2 U0_U1_N00090 A3_H U0_U1_N00069 0 NMOS + L=1.6u + W=3.2u M_U0_U1_Q17 U0_G3O_H_S U0_U1_N00134 0 0 NMOS + L=1.6u + W=3.2u M_U0_U1_Q16 U0_H4O_H_S U0_U1_N00265 U0_G3O_H_S 0 NMOS + L=1.6u + W=3.2u M_U0_U1_Q10 U0_U1_N00134 A3_H U0_U1_N00090 0 NMOS + L=1.6u + W=3.2u M_U0_U1_Q11 U0_U1_N00134 B3_H U0_U1_N00090 0 NMOS + L=1.6u + W=3.2u M_U0_U1_Q12 U0_U1_N00134 CLK VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U1_Q13 U0_G3O_H_S U0_U1_N00134 VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U1_Q14 U0_H4O_H_S U0_U1_N00134 VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U1_Q1 VDD CLK_INV U0_U1_N00090 0 NMOS + L=1.6u + W=3.2u M_U0_U1_Q15 U0_H4O_H_S U0_U1_N00265 VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U1_Q9 U0_U1_N037282 B1_H 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_7_Q23 U0_USUM_7_N00246 S_7B_H VDD 5 PMOS + L=1.6u + W=2u M_U0_USUM_7_Q21 S_7B_H U0_USUM_7_N00246 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_7_Q20 S_7B_H U0_USUM_7_N00246 VDD 5 PMOS + L=1.6u + W=6.4u M_U0_USUM_7_Q18 S_7B_L U0_USUM_7_N00243 VDD 5 PMOS + L=1.6u + W=6.4u M_U0_USUM_7_Q19 S_7B_L U0_USUM_7_N00243 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_7_Q4 U0_USUM_7_N00243 CIN_H U0_USUM_7_N00016 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_7_Q8 U0_USUM_7_N00016 U0_G7_0_1_L_O_S U0_USUM_7_N00156 0 NMOS + + L=1.6u + W=3.2u M_U0_USUM_7_Q15 U0_USUM_7_N00016 U0_G7_0_1_H_O_S U0_USUM_7_N00365 0 + NMOS + L=1.6u + W=3.2u M_U0_USUM_7_Q16 U0_USUM_7_N00243 CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_USUM_7_Q17 U0_USUM_7_N00246 CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_USUM_7_Q10 U0_USUM_7_N00156 U0_K8O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_7_Q6 U0_USUM_7_N00156 U0_G8O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_7_Q9 U0_USUM_7_N00042 U0_G7_0_0_L_O_S U0_USUM_7_N00156 0 NMOS + + L=1.6u + W=3.2u M_U0_USUM_7_Q5 U0_USUM_7_N00365 U0_P8O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_7_Q2 U0_USUM_7_N00243 CIN_L U0_USUM_7_N00042 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_7_Q13 U0_USUM_7_N00042 U0_G7_0_0_H_O_S U0_USUM_7_N00365 0 + NMOS + L=1.6u + W=3.2u M_U0_USUM_7_Q7 U0_USUM_7_N00064 U0_G7_0_1_H_O_S U0_USUM_7_N00156 0 NMOS + + L=1.6u + W=3.2u M_U0_USUM_7_Q3 U0_USUM_7_N00246 CIN_H U0_USUM_7_N00064 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_7_Q14 U0_USUM_7_N00064 U0_G7_0_1_L_O_S U0_USUM_7_N00365 0 + NMOS + L=1.6u + W=3.2u M_U0_USUM_7_Q11 U0_USUM_7_N00092 U0_G7_0_0_H_O_S U0_USUM_7_N00156 0 + NMOS + L=1.6u + W=3.2u M_U0_USUM_7_Q22 U0_USUM_7_N00243 S_7B_L VDD 5 PMOS + L=1.6u + W=2u M_U0_USUM_7_Q1 U0_USUM_7_N00246 CIN_L U0_USUM_7_N00092 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_7_Q12 U0_USUM_7_N00092 U0_G7_0_0_L_O_S U0_USUM_7_N00365 0 + NMOS + L=1.6u + W=3.2u M_U0_USUM_Q23 U0_USUM_N00246 S_0B_H VDD 5 PMOS + L=1.6u + W=2u M_U0_USUM_Q21 S_0B_H U0_USUM_N00246 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_Q20 S_0B_H U0_USUM_N00246 VDD 5 PMOS + L=1.6u + W=6.4u M_U0_USUM_Q18 S_0B_L U0_USUM_N00243 VDD 5 PMOS + L=1.6u + W=6.4u M_U0_USUM_Q19 S_0B_L U0_USUM_N00243 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_Q4 U0_USUM_N00243 CIN_H U0_USUM_N00016 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_Q8 U0_USUM_N00016 U0_G0_0_1_L_O_S U0_USUM_N00156 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_Q15 U0_USUM_N00016 U0_G0_0_1_H_O_S U0_USUM_N00365 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_Q16 U0_USUM_N00243 CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_USUM_Q17 U0_USUM_N00246 CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_USUM_Q10 U0_USUM_N00156 U0_K1O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_Q6 U0_USUM_N00156 U0_G1O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_Q9 U0_USUM_N00042 U0_G0_0_0_L_O_S U0_USUM_N00156 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_Q5 U0_USUM_N00365 U0_P1O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_Q2 U0_USUM_N00243 CIN_L U0_USUM_N00042 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_Q13 U0_USUM_N00042 U0_G0_0_0_H_O_S U0_USUM_N00365 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_Q7 U0_USUM_N00064 U0_G0_0_1_H_O_S U0_USUM_N00156 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_Q3 U0_USUM_N00246 CIN_H U0_USUM_N00064 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_Q14 U0_USUM_N00064 U0_G0_0_1_L_O_S U0_USUM_N00365 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_Q11 U0_USUM_N00092 U0_G0_0_0_H_O_S U0_USUM_N00156 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_Q22 U0_USUM_N00243 S_0B_L VDD 5 PMOS + L=1.6u + W=2u M_U0_USUM_Q1 U0_USUM_N00246 CIN_L U0_USUM_N00092 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_Q12 U0_USUM_N00092 U0_G0_0_0_L_O_S U0_USUM_N00365 0 NMOS + L=1.6u + W=3.2u M_U0_U5_1_Q5 U0_G3_0_1_L U0_U5_1_N00028 0 0 NMOS + L=1.6u + W=3.2u M_U0_U5_1_Q4 U0_G3_0_1_L U0_U5_1_N00028 VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U5_1_Q2 U0_U5_1_N00028 U0_I4O_L_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_U5_1_Q1 U0_U5_1_N00028 U0_G3O_L_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_U5_1_Q3 U0_U5_1_N00028 CLK VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U3_2_Q8 U0_U3_2_N03502 A7_H U0_U3_2_N03532 0 NMOS + L=1.6u + W=3.2u M_U0_U3_2_Q2 U0_U3_2_N03502 B7_H U0_U3_2_N03532 0 NMOS + L=1.6u + W=3.2u M_U0_U3_2_Q1 U0_U3_2_N03532 B6_H 0 0 NMOS + L=1.6u + W=3.2u M_U0_U3_2_Q7 U0_U3_2_N03532 A6_H 0 0 NMOS + L=1.6u + W=3.2u M_U0_U3_2_Q13 U0_U3_2_N03500 CLK VDD 5 PMOS + L=1.6u + W=9.6u M_U0_U3_2_Q16 U0_U3_2_N03502 CLK VDD 5 PMOS + L=1.6u + W=9.6u M_U0_U3_2_Q4 U0_I8O_H_S U0_U3_2_N03502 0 0 NMOS + L=1.6u + W=3.2u M_U0_U3_2_Q12 U0_I8O_H_S U0_U3_2_N03502 U0_U3_2_N03508 5 PMOS + L=1.6u + W=6.4u M_U0_U3_2_Q6 U0_I8O_H_S U0_U3_2_N03500 0 0 NMOS + L=1.6u + W=3.2u M_U0_U3_2_Q14 U0_I8O_H_S U0_U3_2_N03500 U0_U3_2_N03510 5 PMOS + L=1.6u + W=6.4u M_U0_U3_2_Q15 U0_U3_2_N03508 U0_U3_2_N03500 VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U3_2_Q11 U0_U3_2_N03510 U0_U3_2_N03502 VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U3_2_Q20 U0_U3_2_N03500 U0_I8O_H_S VDD 5 PMOS + L=1.6u + W=3.2u M_U0_U3_2_Q21 U0_U3_2_N03502 U0_I8O_H_S VDD 5 PMOS + L=1.6u + W=3.2u M_U0_U3_2_Q3 U0_U3_2_N03500 A5_H U0_U3_2_N03522 0 NMOS + L=1.6u + W=3.2u M_U0_U3_2_Q9 U0_U3_2_N03522 A4_H 0 0 NMOS + L=1.6u + W=3.2u M_U0_U3_2_Q5 U0_U3_2_N03500 B5_H U0_U3_2_N03522 0 NMOS + L=1.6u + W=3.2u M_U0_U3_2_Q10 U0_U3_2_N03522 B4_H 0 0 NMOS + L=1.6u + W=3.2u M_U0_U20_1_U0_Q3 U0_U20_1_G4_0_0_L_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_U20_1_U0_Q9 U0_U20_1_G5_0_0_L_INV_OUT U0_P5O_S + U0_U20_1_G4_0_0_L_INV_OUT 0 NMOS + L=1.6u + W=3.2u M_U0_U20_1_U0_Q11 U0_U20_1_G4_0_0_H_INV_OUT U0_P4O_S U0_U20_1_U0_N08997 + 0 NMOS + L=1.6u + W=3.2u M_U0_U20_1_U0_Q21 U0_U20_1_G6_0_0_H_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_U20_1_U0_Q2 U0_U20_1_G4_0_0_H_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_U20_1_U0_Q6 U0_U20_1_U0_N08997 U0_G3_0_1_H 0 0 NMOS + L=1.6u + W=3.2u M_U0_U20_1_U0_Q18 U0_U20_1_G5_0_0_L_INV_OUT U0_K5O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_U20_1_U0_Q4 U0_U20_1_U0_N80853 CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_U20_1_U0_Q7 U0_U20_1_G4_0_0_H_INV_OUT U0_G4O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_U20_1_U0_Q15 U0_U20_1_G6_0_0_L_INV_OUT U0_K6O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_U20_1_U0_Q16 U0_U20_1_G5_0_0_H_INV_OUT U0_G5O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_U20_1_U0_Q5 U0_U20_1_G4_0_0_L_INV_OUT U0_K4O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_U20_1_U0_Q14 U0_U20_1_G5_0_0_H_INV_OUT U0_P5O_S + U0_U20_1_G4_0_0_H_INV_OUT 0 NMOS + L=1.6u + W=3.2u M_U0_U20_1_U0_Q1 U0_U20_1_U0_N08997 CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_U20_1_U0_Q19 U0_U20_1_G5_0_0_H_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_U20_1_U0_Q22 U0_U20_1_G6_0_0_L_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_U20_1_U0_Q13 U0_U20_1_G6_0_0_L_INV_OUT U0_P6O_S + U0_U20_1_G5_0_0_L_INV_OUT 0 NMOS + L=1.6u + W=3.2u M_U0_U20_1_U0_Q20 U0_U20_1_G5_0_0_L_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_U20_1_U0_Q12 U0_U20_1_G4_0_0_L_INV_OUT U0_P4O_S U0_U20_1_U0_N80853 + 0 NMOS + L=1.6u + W=3.2u M_U0_U20_1_U0_Q10 U0_U20_1_G6_0_0_H_INV_OUT U0_P6O_S + U0_U20_1_G5_0_0_H_INV_OUT 0 NMOS + L=1.6u + W=3.2u M_U0_U20_1_U0_Q17 U0_U20_1_G6_0_0_H_INV_OUT U0_G6O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_U20_1_U0_Q8 U0_U20_1_U0_N80853 U0_G3_0_1_L 0 0 NMOS + L=1.6u + W=3.2u M_U0_U20_1_U1_Q1 U0_G4_0_1_H_O_S U0_U20_1_G4_0_0_H_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U20_1_U1_Q2 U0_G4_0_1_H_O_S U0_U20_1_G4_0_0_H_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U20_1_U1_1_Q1 U0_G4_0_1_L_O_S U0_U20_1_G4_0_0_L_INV_OUT VDD 5 PMOS + + L=1.6u + W=6.4u M_U0_U20_1_U1_1_Q2 U0_G4_0_1_L_O_S U0_U20_1_G4_0_0_L_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U20_1_U1_2_Q1 U0_G5_0_1_H_O_S U0_U20_1_G5_0_0_H_INV_OUT VDD 5 PMOS + + L=1.6u + W=6.4u M_U0_U20_1_U1_2_Q2 U0_G5_0_1_H_O_S U0_U20_1_G5_0_0_H_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U20_1_U1_3_Q1 U0_G5_0_1_L_O_S U0_U20_1_G5_0_0_L_INV_OUT VDD 5 PMOS + + L=1.6u + W=6.4u M_U0_U20_1_U1_3_Q2 U0_G5_0_1_L_O_S U0_U20_1_G5_0_0_L_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U20_1_U1_4_Q1 U0_G6_0_1_H_O_S U0_U20_1_G6_0_0_H_INV_OUT VDD 5 PMOS + + L=1.6u + W=6.4u M_U0_U20_1_U1_4_Q2 U0_G6_0_1_H_O_S U0_U20_1_G6_0_0_H_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U20_1_U1_5_Q1 U0_G6_0_1_L_O_S U0_U20_1_G6_0_0_L_INV_OUT VDD 5 PMOS + + L=1.6u + W=6.4u M_U0_U20_1_U1_5_Q2 U0_G6_0_1_L_O_S U0_U20_1_G6_0_0_L_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U1_2_Q8 U0_U1_2_N00079 A5_H U0_U1_2_N037282 0 NMOS + L=1.6u + W=3.2u M_U0_U1_2_Q20 U0_U1_2_N037321 B8_H 0 0 NMOS + L=1.6u + W=3.2u M_U0_U1_2_Q6 U0_U1_2_N00090 A6_H U0_U1_2_N00079 0 NMOS + L=1.6u + W=3.2u M_U0_U1_2_Q19 U0_U1_2_N00265 A8_H U0_U1_2_N037321 0 NMOS + L=1.6u + W=3.2u M_U0_U1_2_Q7 U0_U1_2_N00090 B6_H U0_U1_2_N00079 0 NMOS + L=1.6u + W=3.2u M_U0_U1_2_Q5 U0_U1_2_N00073 B6_H 0 0 NMOS + L=1.6u + W=3.2u M_U0_U1_2_Q18 U0_U1_2_N00265 CLK VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U1_2_Q4 U0_U1_2_N00090 A6_H U0_U1_2_N00073 0 NMOS + L=1.6u + W=3.2u M_U0_U1_2_Q3 U0_U1_2_N00069 B7_H 0 0 NMOS + L=1.6u + W=3.2u M_U0_U1_2_Q2 U0_U1_2_N00090 A7_H U0_U1_2_N00069 0 NMOS + L=1.6u + W=3.2u M_U0_U1_2_Q17 U0_G7O_H_S U0_U1_2_N00134 0 0 NMOS + L=1.6u + W=3.2u M_U0_U1_2_Q16 U0_H8O_H_S U0_U1_2_N00265 U0_G7O_H_S 0 NMOS + L=1.6u + W=3.2u M_U0_U1_2_Q10 U0_U1_2_N00134 A7_H U0_U1_2_N00090 0 NMOS + L=1.6u + W=3.2u M_U0_U1_2_Q11 U0_U1_2_N00134 B7_H U0_U1_2_N00090 0 NMOS + L=1.6u + W=3.2u M_U0_U1_2_Q12 U0_U1_2_N00134 CLK VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U1_2_Q13 U0_G7O_H_S U0_U1_2_N00134 VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U1_2_Q14 U0_H8O_H_S U0_U1_2_N00134 VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U1_2_Q1 VDD CLK_INV U0_U1_2_N00090 0 NMOS + L=1.6u + W=3.2u M_U0_U1_2_Q15 U0_H8O_H_S U0_U1_2_N00265 VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U1_2_Q9 U0_U1_2_N037282 B5_H 0 0 NMOS + L=1.6u + W=3.2u M_U0_U1_3_Q8 U0_U1_3_N00079 A5_L U0_U1_3_N037282 0 NMOS + L=1.6u + W=3.2u M_U0_U1_3_Q20 U0_U1_3_N037321 B8_L 0 0 NMOS + L=1.6u + W=3.2u M_U0_U1_3_Q6 U0_U1_3_N00090 A6_L U0_U1_3_N00079 0 NMOS + L=1.6u + W=3.2u M_U0_U1_3_Q19 U0_U1_3_N00265 A8_L U0_U1_3_N037321 0 NMOS + L=1.6u + W=3.2u M_U0_U1_3_Q7 U0_U1_3_N00090 B6_L U0_U1_3_N00079 0 NMOS + L=1.6u + W=3.2u M_U0_U1_3_Q5 U0_U1_3_N00073 B6_L 0 0 NMOS + L=1.6u + W=3.2u M_U0_U1_3_Q18 U0_U1_3_N00265 CLK VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U1_3_Q4 U0_U1_3_N00090 A6_L U0_U1_3_N00073 0 NMOS + L=1.6u + W=3.2u M_U0_U1_3_Q3 U0_U1_3_N00069 B7_L 0 0 NMOS + L=1.6u + W=3.2u M_U0_U1_3_Q2 U0_U1_3_N00090 A7_L U0_U1_3_N00069 0 NMOS + L=1.6u + W=3.2u M_U0_U1_3_Q17 U0_G7O_L_S U0_U1_3_N00134 0 0 NMOS + L=1.6u + W=3.2u M_U0_U1_3_Q16 U0_H8O_L_S U0_U1_3_N00265 U0_G7O_L_S 0 NMOS + L=1.6u + W=3.2u M_U0_U1_3_Q10 U0_U1_3_N00134 A7_L U0_U1_3_N00090 0 NMOS + L=1.6u + W=3.2u M_U0_U1_3_Q11 U0_U1_3_N00134 B7_L U0_U1_3_N00090 0 NMOS + L=1.6u + W=3.2u M_U0_U1_3_Q12 U0_U1_3_N00134 CLK VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U1_3_Q13 U0_G7O_L_S U0_U1_3_N00134 VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U1_3_Q14 U0_H8O_L_S U0_U1_3_N00134 VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U1_3_Q1 VDD CLK_INV U0_U1_3_N00090 0 NMOS + L=1.6u + W=3.2u M_U0_U1_3_Q15 U0_H8O_L_S U0_U1_3_N00265 VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U1_3_Q9 U0_U1_3_N037282 B5_L 0 0 NMOS + L=1.6u + W=3.2u M_U0_U7_U0_Q11 U0_U7_G0_0_0_H_INV_OUT 0 U0_U7_U0_N08997 0 NMOS + L=1.6u + W=3.2u M_U0_U7_U0_Q21 U0_U7_G2_0_0_H_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_U7_U0_Q9 U0_U7_G1_0_0_L_INV_OUT U0_P1O_S U0_U7_G0_0_0_L_INV_OUT 0 + NMOS + L=1.6u + W=3.2u M_U0_U7_U0_Q22 U0_U7_G2_0_0_L_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_U7_U0_Q8 U0_U7_U0_N02549 G-1_0_L_IN_SIG 0 0 NMOS + L=1.6u + W=3.2u M_U0_U7_U0_Q2 U0_U7_G0_0_0_H_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_U7_U0_Q6 U0_U7_U0_N08997 G-1_0_H_IN_SIG 0 0 NMOS + L=1.6u + W=3.2u M_U0_U7_U0_Q7 U0_U7_G0_0_0_H_INV_OUT CIN_H 0 0 NMOS + L=1.6u + W=3.2u M_U0_U7_U0_Q16 U0_U7_G1_0_0_H_INV_OUT U0_G1O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_U7_U0_Q14 U0_U7_G1_0_0_H_INV_OUT U0_P1O_S U0_U7_G0_0_0_H_INV_OUT 0 + NMOS + L=1.6u + W=3.2u M_U0_U7_U0_Q1 U0_U7_U0_N08997 CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_U7_U0_Q18 U0_U7_G1_0_0_L_INV_OUT U0_K1O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_U7_U0_Q19 U0_U7_G1_0_0_H_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_U7_U0_Q12 U0_U7_G0_0_0_L_INV_OUT 0 U0_U7_U0_N02549 0 NMOS + L=1.6u + W=3.2u M_U0_U7_U0_Q5 U0_U7_G0_0_0_L_INV_OUT CIN_L 0 0 NMOS + L=1.6u + W=3.u M_U0_U7_U0_Q10 U0_U7_G2_0_0_H_INV_OUT U0_P2O_S U0_U7_G1_0_0_H_INV_OUT 0 + NMOS + L=1.6u + W=3.2u M_U0_U7_U0_Q13 U0_U7_G2_0_0_L_INV_OUT U0_P2O_S U0_U7_G1_0_0_L_INV_OUT 0 + NMOS + L=1.6u + W=3.2u M_U0_U7_U0_Q3 U0_U7_G0_0_0_L_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_U7_U0_Q20 U0_U7_G1_0_0_L_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_U7_U0_Q15 U0_U7_G2_0_0_L_INV_OUT U0_K2O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_U7_U0_Q17 U0_U7_G2_0_0_H_INV_OUT U0_G2O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_U7_U0_Q4 U0_U7_U0_N02549 CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_U7_U1_2_Q1 U0_G1_0_0_H_O_S U0_U7_G1_0_0_H_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U7_U1_2_Q2 U0_G1_0_0_H_O_S U0_U7_G1_0_0_H_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U7_U1_3_Q1 U0_G1_0_0_L_O_S U0_U7_G1_0_0_L_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U7_U1_3_Q2 U0_G1_0_0_L_O_S U0_U7_G1_0_0_L_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U7_U1_4_Q1 U0_G2_0_0_H_O_S U0_U7_G2_0_0_H_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U7_U1_4_Q2 U0_G2_0_0_H_O_S U0_U7_G2_0_0_H_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U7_U1_5_Q1 U0_G2_0_0_L_O_S U0_U7_G2_0_0_L_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U7_U1_5_Q2 U0_G2_0_0_L_O_S U0_U7_G2_0_0_L_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U7_U1_Q1 U0_G0_0_0_H_O_S U0_U7_G0_0_0_H_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U7_U1_Q2 U0_G0_0_0_H_O_S U0_U7_G0_0_0_H_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U7_U1_1_Q1 U0_G0_0_0_L_O_S U0_U7_G0_0_0_L_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U7_U1_1_Q2 U0_G0_0_0_L_O_S U0_U7_G0_0_0_L_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U22_1_Q1 U0_U22_1_N00876 U0_G3_0_1_L 0 0 NMOS + L=1.6u + W=3.2u M_U0_U22_1_Q5 U0_U22_1_N00876 U0_K4O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_U22_1_Q8 U0_U22_1_G7_0_H_INV U0_G7O_H_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_U22_1_Q6 U0_U22_1_G7_0_L_INV U0_G7O_L_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_U22_1_Q7 U0_U22_1_G7_0_H_INV U0_I8O_H_S U0_U22_1_N00840 0 NMOS + L=1.6u + W=3.2u M_U0_U22_1_Q4 U0_U22_1_G7_0_L_INV U0_I8O_L_S U0_U22_1_N00876 0 NMOS + L=1.6u + W=3.2u M_U0_U22_1_Q11 U0_U22_1_N00840 CLK VDD 5 PMOS + L=1.6u + W=9.6u M_U0_U22_1_Q12 U0_U22_1_N00876 CLK VDD 5 PMOS + L=1.6u + W=9.6u M_U0_U22_1_Q9 U0_U22_1_G7_0_H_INV CLK VDD 5 PMOS + L=1.6u + W=9.6u M_U0_U22_1_Q10 U0_U22_1_G7_0_L_INV CLK VDD 5 PMOS + L=1.6u + W=9.6u M_U0_U22_1_G70_h_Q1 U0_G7_0_1_H_O_S U0_U22_1_G7_0_H_INV VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U22_1_G70_h_Q2 U0_G7_0_1_H_O_S U0_U22_1_G7_0_H_INV 0 0 NMOS + L=1.6u + W=3.2u M_U0_U22_1_G70_l_Q1 U0_G7_0_1_L_O_S U0_U22_1_G7_0_L_INV VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U22_1_G70_l_Q2 U0_G7_0_1_L_O_S U0_U22_1_G7_0_L_INV 0 0 NMOS + L=1.6u + W=3.2u M_U0_U22_1_Q3 U0_U22_1_N00840 U0_G3_0_1_H 0 0 NMOS + L=1.6u + W=3.2u M_U0_U22_1_Q2 U0_U22_1_N00840 U0_G4O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_U3_3_Q8 U0_U3_3_N03502 A7_L U0_U3_3_N03532 0 NMOS + L=1.6u + W=3.2u M_U0_U3_3_Q2 U0_U3_3_N03502 B7_L U0_U3_3_N03532 0 NMOS + L=1.6u + W=3.2u M_U0_U3_3_Q1 U0_U3_3_N03532 B6_L 0 0 NMOS + L=1.6u + W=3.2u M_U0_U3_3_Q7 U0_U3_3_N03532 A6_L 0 0 NMOS + L=1.6u + W=3.2u M_U0_U3_3_Q13 U0_U3_3_N03500 CLK VDD 5 PMOS + L=1.6u + W=9.6u M_U0_U3_3_Q16 U0_U3_3_N03502 CLK VDD 5 PMOS + L=1.6u + W=9.6u M_U0_U3_3_Q4 U0_I8O_L_S U0_U3_3_N03502 0 0 NMOS + L=1.6u + W=3.2u M_U0_U3_3_Q12 U0_I8O_L_S U0_U3_3_N03502 U0_U3_3_N03508 5 PMOS + L=1.6u + W=6.4u M_U0_U3_3_Q6 U0_I8O_L_S U0_U3_3_N03500 0 0 NMOS + L=1.6u + W=3.2u M_U0_U3_3_Q14 U0_I8O_L_S U0_U3_3_N03500 U0_U3_3_N03510 5 PMOS + L=1.6u + W=6.4u M_U0_U3_3_Q15 U0_U3_3_N03508 U0_U3_3_N03500 VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U3_3_Q11 U0_U3_3_N03510 U0_U3_3_N03502 VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U3_3_Q20 U0_U3_3_N03500 U0_I8O_L_S VDD 5 PMOS + L=1.6u + W=3.2u M_U0_U3_3_Q21 U0_U3_3_N03502 U0_I8O_L_S VDD 5 PMOS + L=1.6u + W=3.2u M_U0_U3_3_Q3 U0_U3_3_N03500 A5_L U0_U3_3_N03522 0 NMOS + L=1.6u + W=3.2u M_U0_U3_3_Q9 U0_U3_3_N03522 A4_L 0 0 NMOS + L=1.6u + W=3.2u M_U0_U3_3_Q5 U0_U3_3_N03500 B5_L U0_U3_3_N03522 0 NMOS + L=1.6u + W=3.2u M_U0_U3_3_Q10 U0_U3_3_N03522 B4_L 0 0 NMOS + L=1.6u + W=3.2u M_U0_U20_U0_Q3 U0_U20_1_G4_0_0_L_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_U20_U0_Q9 U0_U20_1_G5_0_0_L_INV_OUT U0_P5O_S + U0_U20_1_G4_0_0_L_INV_OUT 0 NMOS + L=1.6u + W=3.2u M_U0_U20_U0_Q11 U0_U20_1_G4_0_0_H_INV_OUT U0_P4O_S U0_U20_U0_N08997 0 + NMOS + L=1.6u + W=3.2u M_U0_U20_U0_Q21 U0_U20_1_G6_0_0_H_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_U20_U0_Q2 U0_U20_1_G4_0_0_H_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_U20_U0_Q6 U0_U20_U0_N08997 U0_G3O_H_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_U20_U0_Q18 U0_U20_1_G5_0_0_L_INV_OUT U0_K5O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_U20_U0_Q4 U0_U20_U0_N80853 CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_U20_U0_Q7 U0_U20_1_G4_0_0_H_INV_OUT U0_G4O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_U20_U0_Q15 U0_U20_1_G6_0_0_L_INV_OUT U0_K6O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_U20_U0_Q16 U0_U20_1_G5_0_0_H_INV_OUT U0_G5O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_U20_U0_Q5 U0_U20_1_G4_0_0_L_INV_OUT U0_K4O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_U20_U0_Q14 U0_U20_1_G5_0_0_H_INV_OUT U0_P5O_S + U0_U20_1_G4_0_0_H_INV_OUT 0 NMOS + L=1.6u + W=3.2u M_U0_U20_U0_Q1 U0_U20_U0_N08997 CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_U20_U0_Q19 U0_U20_1_G5_0_0_H_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_U20_U0_Q22 U0_U20_1_G6_0_0_L_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_U20_U0_Q13 U0_U20_1_G6_0_0_L_INV_OUT U0_P6O_S + U0_U20_1_G5_0_0_L_INV_OUT 0 NMOS + L=1.6u + W=3.2u M_U0_U20_U0_Q20 U0_U20_1_G5_0_0_L_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_U20_U0_Q12 U0_U20_1_G4_0_0_L_INV_OUT U0_P4O_S U0_U20_U0_N80853 0 + NMOS + L=1.6u + W=3.2u M_U0_U20_U0_Q10 U0_U20_1_G6_0_0_H_INV_OUT U0_P6O_S + U0_U20_1_G5_0_0_H_INV_OUT 0 NMOS + L=1.6u + W=3.2u M_U0_U20_U0_Q17 U0_U20_1_G6_0_0_H_INV_OUT U0_G6O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_U20_U0_Q8 U0_U20_U0_N80853 U0_G3O_L_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_U20_U1_Q1 U0_G4_0_0_H_O_S U0_U20_1_G4_0_0_H_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U20_U1_Q2 U0_G4_0_0_H_O_S U0_U20_1_G4_0_0_H_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U20_U1_1_Q1 U0_G4_0_0_L_O_S U0_U20_1_G4_0_0_L_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U20_U1_1_Q2 U0_G4_0_0_L_O_S U0_U20_1_G4_0_0_L_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U20_U1_2_Q1 U0_G5_0_0_H_O_S U0_U20_1_G5_0_0_H_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U20_U1_2_Q2 U0_G5_0_0_H_O_S U0_U20_1_G5_0_0_H_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U20_U1_3_Q1 U0_G5_0_0_L_O_S U0_U20_1_G5_0_0_L_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U20_U1_3_Q2 U0_G5_0_0_L_O_S U0_U20_1_G5_0_0_L_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U20_U1_4_Q1 U0_G6_0_0_H_O_S U0_U20_1_G6_0_0_H_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U20_U1_4_Q2 U0_G6_0_0_H_O_S U0_U20_1_G6_0_0_H_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U20_U1_5_Q1 U0_G6_0_0_L_O_S U0_U20_1_G6_0_0_L_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U20_U1_5_Q2 U0_G6_0_0_L_O_S U0_U20_1_G6_0_0_L_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_2_Q23 U0_USUM_2_N00246 S_2B_H VDD 5 PMOS + L=1.6u + W=2u M_U0_USUM_2_Q21 S_2B_H U0_USUM_2_N00246 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_2_Q20 S_2B_H U0_USUM_2_N00246 VDD 5 PMOS + L=1.6u + W=6.4u M_U0_USUM_2_Q18 S_2B_L U0_USUM_2_N00243 VDD 5 PMOS + L=1.6u + W=6.4u M_U0_USUM_2_Q19 S_2B_L U0_USUM_2_N00243 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_2_Q4 U0_USUM_2_N00243 CIN_H U0_USUM_2_N00016 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_2_Q8 U0_USUM_2_N00016 U0_G2_0_1_L_O_S U0_USUM_2_N00156 0 NMOS + + L=1.6u + W=3.2u M_U0_USUM_2_Q15 U0_USUM_2_N00016 U0_G2_0_1_H_O_S U0_USUM_2_N00365 0 + NMOS + L=1.6u + W=3.2u M_U0_USUM_2_Q16 U0_USUM_2_N00243 CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_USUM_2_Q17 U0_USUM_2_N00246 CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_USUM_2_Q10 U0_USUM_2_N00156 U0_K3O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_2_Q6 U0_USUM_2_N00156 U0_G3O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_2_Q9 U0_USUM_2_N00042 U0_G2_0_0_L_O_S U0_USUM_2_N00156 0 NMOS + + L=1.6u + W=3.2u M_U0_USUM_2_Q5 U0_USUM_2_N00365 U0_P3O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_2_Q2 U0_USUM_2_N00243 CIN_L U0_USUM_2_N00042 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_2_Q13 U0_USUM_2_N00042 U0_G2_0_0_H_O_S U0_USUM_2_N00365 0 + NMOS + L=1.6u + W=3.2u M_U0_USUM_2_Q7 U0_USUM_2_N00064 U0_G2_0_1_H_O_S U0_USUM_2_N00156 0 NMOS + + L=1.6u + W=3.2u M_U0_USUM_2_Q3 U0_USUM_2_N00246 CIN_H U0_USUM_2_N00064 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_2_Q14 U0_USUM_2_N00064 U0_G2_0_1_L_O_S U0_USUM_2_N00365 0 + NMOS + L=1.6u + W=3.2u M_U0_USUM_2_Q11 U0_USUM_2_N00092 U0_G2_0_0_H_O_S U0_USUM_2_N00156 0 + NMOS + L=1.6u + W=3.2u M_U0_USUM_2_Q22 U0_USUM_2_N00243 S_2B_L VDD 5 PMOS + L=1.6u + W=2u M_U0_USUM_2_Q1 U0_USUM_2_N00246 CIN_L U0_USUM_2_N00092 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_2_Q12 U0_USUM_2_N00092 U0_G2_0_0_L_O_S U0_USUM_2_N00365 0 + NMOS + L=1.6u + W=3.2u M_U0_USUM_3_Q23 U0_USUM_3_N00246 S_3B_H VDD 5 PMOS + L=1.6u + W=2u M_U0_USUM_3_Q21 S_3B_H U0_USUM_3_N00246 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_3_Q20 S_3B_H U0_USUM_3_N00246 VDD 5 PMOS + L=1.6u + W=6.4u M_U0_USUM_3_Q18 S_3B_L U0_USUM_3_N00243 VDD 5 PMOS + L=1.6u + W=6.4u M_U0_USUM_3_Q19 S_3B_L U0_USUM_3_N00243 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_3_Q4 U0_USUM_3_N00243 CIN_H U0_USUM_3_N00016 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_3_Q8 U0_USUM_3_N00016 U0_G3_0_1_L U0_USUM_3_N00156 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_3_Q15 U0_USUM_3_N00016 U0_G3_0_1_H U0_USUM_3_N00365 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_3_Q16 U0_USUM_3_N00243 CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_USUM_3_Q17 U0_USUM_3_N00246 CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_USUM_3_Q10 U0_USUM_3_N00156 U0_K4O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_3_Q6 U0_USUM_3_N00156 U0_G4O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_3_Q9 U0_USUM_3_N00042 U0_G3O_L_S U0_USUM_3_N00156 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_3_Q5 U0_USUM_3_N00365 U0_P4O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_3_Q2 U0_USUM_3_N00243 CIN_L U0_USUM_3_N00042 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_3_Q13 U0_USUM_3_N00042 U0_G3O_H_S U0_USUM_3_N00365 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_3_Q7 U0_USUM_3_N00064 U0_G3_0_1_H U0_USUM_3_N00156 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_3_Q3 U0_USUM_3_N00246 CIN_H U0_USUM_3_N00064 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_3_Q14 U0_USUM_3_N00064 U0_G3_0_1_L U0_USUM_3_N00365 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_3_Q11 U0_USUM_3_N00092 U0_G3O_H_S U0_USUM_3_N00156 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_3_Q22 U0_USUM_3_N00243 S_3B_L VDD 5 PMOS + L=1.6u + W=2u M_U0_USUM_3_Q1 U0_USUM_3_N00246 CIN_L U0_USUM_3_N00092 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_3_Q12 U0_USUM_3_N00092 U0_G3O_L_S U0_USUM_3_N00365 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_6_Q23 U0_USUM_6_N00246 S_6B_H VDD 5 PMOS + L=1.6u + W=2u M_U0_USUM_6_Q21 S_6B_H U0_USUM_6_N00246 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_6_Q20 S_6B_H U0_USUM_6_N00246 VDD 5 PMOS + L=1.6u + W=6.4u M_U0_USUM_6_Q18 S_6B_L U0_USUM_6_N00243 VDD 5 PMOS + L=1.6u + W=6.4u M_U0_USUM_6_Q19 S_6B_L U0_USUM_6_N00243 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_6_Q4 U0_USUM_6_N00243 CIN_H U0_USUM_6_N00016 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_6_Q8 U0_USUM_6_N00016 U0_G6_0_1_L_O_S U0_USUM_6_N00156 0 NMOS + + L=1.6u + W=3.2u M_U0_USUM_6_Q15 U0_USUM_6_N00016 U0_G6_0_1_H_O_S U0_USUM_6_N00365 0 + NMOS + L=1.6u + W=3.2u M_U0_USUM_6_Q16 U0_USUM_6_N00243 CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_USUM_6_Q17 U0_USUM_6_N00246 CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_USUM_6_Q10 U0_USUM_6_N00156 U0_K7O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_6_Q6 U0_USUM_6_N00156 U0_G7O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_6_Q9 U0_USUM_6_N00042 U0_G6_0_0_L_O_S U0_USUM_6_N00156 0 NMOS + + L=1.6u + W=3.2u M_U0_USUM_6_Q5 U0_USUM_6_N00365 U0_P7O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_6_Q2 U0_USUM_6_N00243 CIN_L U0_USUM_6_N00042 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_6_Q13 U0_USUM_6_N00042 U0_G6_0_0_H_O_S U0_USUM_6_N00365 0 + NMOS + L=1.6u + W=3.2u M_U0_USUM_6_Q7 U0_USUM_6_N00064 U0_G6_0_1_H_O_S U0_USUM_6_N00156 0 NMOS + + L=1.6u + W=3.2u M_U0_USUM_6_Q3 U0_USUM_6_N00246 CIN_H U0_USUM_6_N00064 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_6_Q14 U0_USUM_6_N00064 U0_G6_0_1_L_O_S U0_USUM_6_N00365 0 + NMOS + L=1.6u + W=3.2u M_U0_USUM_6_Q11 U0_USUM_6_N00092 U0_G6_0_0_H_O_S U0_USUM_6_N00156 0 + NMOS + L=1.6u + W=3.2u M_U0_USUM_6_Q22 U0_USUM_6_N00243 S_6B_L VDD 5 PMOS + L=1.6u + W=2u M_U0_USUM_6_Q1 U0_USUM_6_N00246 CIN_L U0_USUM_6_N00092 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_6_Q12 U0_USUM_6_N00092 U0_G6_0_0_L_O_S U0_USUM_6_N00365 0 + NMOS + L=1.6u + W=3.2u M_U0_USUM_1_Q23 U0_USUM_1_N00246 S_1B_H VDD 5 PMOS + L=1.6u + W=2u M_U0_USUM_1_Q21 S_1B_H U0_USUM_1_N00246 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_1_Q20 S_1B_H U0_USUM_1_N00246 VDD 5 PMOS + L=1.6u + W=6.4u M_U0_USUM_1_Q18 S_1B_L U0_USUM_1_N00243 VDD 5 PMOS + L=1.6u + W=6.4u M_U0_USUM_1_Q19 S_1B_L U0_USUM_1_N00243 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_1_Q4 U0_USUM_1_N00243 CIN_H U0_USUM_1_N00016 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_1_Q8 U0_USUM_1_N00016 U0_G1_0_1_L_O_S U0_USUM_1_N00156 0 NMOS + + L=1.6u + W=3.2u M_U0_USUM_1_Q15 U0_USUM_1_N00016 U0_G1_0_1_H_O_S U0_USUM_1_N00365 0 + NMOS + L=1.6u + W=3.2u M_U0_USUM_1_Q16 U0_USUM_1_N00243 CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_USUM_1_Q17 U0_USUM_1_N00246 CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_USUM_1_Q10 U0_USUM_1_N00156 U0_K2O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_1_Q6 U0_USUM_1_N00156 U0_G2O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_1_Q9 U0_USUM_1_N00042 U0_G1_0_0_L_O_S U0_USUM_1_N00156 0 NMOS + + L=1.6u + W=3.2u M_U0_USUM_1_Q5 U0_USUM_1_N00365 U0_P2O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_1_Q2 U0_USUM_1_N00243 CIN_L U0_USUM_1_N00042 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_1_Q13 U0_USUM_1_N00042 U0_G1_0_0_H_O_S U0_USUM_1_N00365 0 + NMOS + L=1.6u + W=3.2u M_U0_USUM_1_Q7 U0_USUM_1_N00064 U0_G1_0_1_H_O_S U0_USUM_1_N00156 0 NMOS + + L=1.6u + W=3.2u M_U0_USUM_1_Q3 U0_USUM_1_N00246 CIN_H U0_USUM_1_N00064 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_1_Q14 U0_USUM_1_N00064 U0_G1_0_1_L_O_S U0_USUM_1_N00365 0 + NMOS + L=1.6u + W=3.2u M_U0_USUM_1_Q11 U0_USUM_1_N00092 U0_G1_0_0_H_O_S U0_USUM_1_N00156 0 + NMOS + L=1.6u + W=3.2u M_U0_USUM_1_Q22 U0_USUM_1_N00243 S_1B_L VDD 5 PMOS + L=1.6u + W=2u M_U0_USUM_1_Q1 U0_USUM_1_N00246 CIN_L U0_USUM_1_N00092 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_1_Q12 U0_USUM_1_N00092 U0_G1_0_0_L_O_S U0_USUM_1_N00365 0 + NMOS + L=1.6u + W=3.2u M_U0_U3_Q8 U0_U3_N03502 A3_H U0_U3_N03532 0 NMOS + L=1.6u + W=3.2u M_U0_U3_Q2 U0_U3_N03502 B3_H U0_U3_N03532 0 NMOS + L=1.6u + W=3.2u M_U0_U3_Q1 U0_U3_N03532 B2_H 0 0 NMOS + L=1.6u + W=3.2u M_U0_U3_Q7 U0_U3_N03532 A2_H 0 0 NMOS + L=1.6u + W=3.2u M_U0_U3_Q13 U0_U3_N03500 CLK VDD 5 PMOS + L=1.6u + W=9.6u M_U0_U3_Q16 U0_U3_N03502 CLK VDD 5 PMOS + L=1.6u + W=9.6u M_U0_U3_Q4 U0_I4O_H_S U0_U3_N03502 0 0 NMOS + L=1.6u + W=3.2u M_U0_U3_Q12 U0_I4O_H_S U0_U3_N03502 U0_U3_N03508 5 PMOS + L=1.6u + W=6.4u M_U0_U3_Q6 U0_I4O_H_S U0_U3_N03500 0 0 NMOS + L=1.6u + W=3.2u M_U0_U3_Q14 U0_I4O_H_S U0_U3_N03500 U0_U3_N03510 5 PMOS + L=1.6u + W=6.4u M_U0_U3_Q15 U0_U3_N03508 U0_U3_N03500 VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U3_Q11 U0_U3_N03510 U0_U3_N03502 VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U3_Q20 U0_U3_N03500 U0_I4O_H_S VDD 5 PMOS + L=1.6u + W=3.2u M_U0_U3_Q21 U0_U3_N03502 U0_I4O_H_S VDD 5 PMOS + L=1.6u + W=3.2u M_U0_U3_Q3 U0_U3_N03500 A1_H U0_U3_N03522 0 NMOS + L=1.6u + W=3.2u M_U0_U3_Q9 U0_U3_N03522 CIN_H 0 0 NMOS + L=1.6u + W=3.2u M_U0_U3_Q5 U0_U3_N03500 B1_H U0_U3_N03522 0 NMOS + L=1.6u + W=3.2u M_U0_U3_Q10 U0_U3_N03522 CIN_H 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_5_Q23 U0_USUM_5_N00246 S_5B_H VDD 5 PMOS + L=1.6u + W=2u M_U0_USUM_5_Q21 S_5B_H U0_USUM_5_N00246 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_5_Q20 S_5B_H U0_USUM_5_N00246 VDD 5 PMOS + L=1.6u + W=6.4u M_U0_USUM_5_Q18 S_5B_L U0_USUM_5_N00243 VDD 5 PMOS + L=1.6u + W=6.4u M_U0_USUM_5_Q19 S_5B_L U0_USUM_5_N00243 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_5_Q4 U0_USUM_5_N00243 CIN_H U0_USUM_5_N00016 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_5_Q8 U0_USUM_5_N00016 U0_G5_0_1_L_O_S U0_USUM_5_N00156 0 NMOS + + L=1.6u + W=3.2u M_U0_USUM_5_Q15 U0_USUM_5_N00016 U0_G5_0_1_H_O_S U0_USUM_5_N00365 0 + NMOS + L=1.6u + W=3.2u M_U0_USUM_5_Q16 U0_USUM_5_N00243 CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_USUM_5_Q17 U0_USUM_5_N00246 CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_USUM_5_Q10 U0_USUM_5_N00156 U0_K6O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_5_Q6 U0_USUM_5_N00156 U0_G6O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_5_Q9 U0_USUM_5_N00042 U0_G5_0_0_L_O_S U0_USUM_5_N00156 0 NMOS + + L=1.6u + W=3.2u M_U0_USUM_5_Q5 U0_USUM_5_N00365 U0_P6O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_5_Q2 U0_USUM_5_N00243 CIN_L U0_USUM_5_N00042 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_5_Q13 U0_USUM_5_N00042 U0_G5_0_0_H_O_S U0_USUM_5_N00365 0 + NMOS + L=1.6u + W=3.2u M_U0_USUM_5_Q7 U0_USUM_5_N00064 U0_G5_0_1_H_O_S U0_USUM_5_N00156 0 NMOS + + L=1.6u + W=3.2u M_U0_USUM_5_Q3 U0_USUM_5_N00246 CIN_H U0_USUM_5_N00064 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_5_Q14 U0_USUM_5_N00064 U0_G5_0_1_L_O_S U0_USUM_5_N00365 0 + NMOS + L=1.6u + W=3.2u M_U0_USUM_5_Q11 U0_USUM_5_N00092 U0_G5_0_0_H_O_S U0_USUM_5_N00156 0 + NMOS + L=1.6u + W=3.2u M_U0_USUM_5_Q22 U0_USUM_5_N00243 S_5B_L VDD 5 PMOS + L=1.6u + W=2u M_U0_USUM_5_Q1 U0_USUM_5_N00246 CIN_L U0_USUM_5_N00092 0 NMOS + L=1.6u + W=3.2u M_U0_USUM_5_Q12 U0_USUM_5_N00092 U0_G5_0_0_L_O_S U0_USUM_5_N00365 0 + NMOS + L=1.6u + W=3.2u M_U0_U7_1_U0_Q11 U0_U7_G0_0_0_H_INV_OUT 0 U0_U7_1_U0_N08997 0 NMOS + L=1.6u + W=3.2u M_U0_U7_1_U0_Q21 U0_U7_G2_0_0_H_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_U7_1_U0_Q9 U0_U7_G1_0_0_L_INV_OUT U0_P1O_S U0_U7_G0_0_0_L_INV_OUT + 0 NMOS + L=1.6u + W=3.2u M_U0_U7_1_U0_Q22 U0_U7_G2_0_0_L_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_U7_1_U0_Q8 U0_U7_1_U0_N02549 G-1_0_H_IN_SIG 0 0 NMOS + L=1.6u + W=3.2u M_U0_U7_1_U0_Q2 U0_U7_G0_0_0_H_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_U7_1_U0_Q6 U0_U7_1_U0_N08997 G-1_0_L_IN_SIG 0 0 NMOS + L=1.6u + W=3.2u M_U0_U7_1_U0_Q7 U0_U7_G0_0_0_H_INV_OUT CIN_H 0 0 NMOS + L=1.6u + W=3.2u M_U0_U7_1_U0_Q16 U0_U7_G1_0_0_H_INV_OUT U0_G1O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_U7_1_U0_Q14 U0_U7_G1_0_0_H_INV_OUT U0_P1O_S U0_U7_G0_0_0_H_INV_OUT + 0 NMOS + L=1.6u + W=3.2u M_U0_U7_1_U0_Q1 U0_U7_1_U0_N08997 CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_U7_1_U0_Q18 U0_U7_G1_0_0_L_INV_OUT U0_K1O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_U7_1_U0_Q19 U0_U7_G1_0_0_H_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_U7_1_U0_Q12 U0_U7_G0_0_0_L_INV_OUT 0 U0_U7_1_U0_N02549 0 NMOS + L=1.6u + W=3.2u M_U0_U7_1_U0_Q5 U0_U7_G0_0_0_L_INV_OUT CIN_L 0 0 NMOS + L=1.6u + W=3.u M_U0_U7_1_U0_Q10 U0_U7_G2_0_0_H_INV_OUT U0_P2O_S U0_U7_G1_0_0_H_INV_OUT + 0 NMOS + L=1.6u + W=3.2u M_U0_U7_1_U0_Q13 U0_U7_G2_0_0_L_INV_OUT U0_P2O_S U0_U7_G1_0_0_L_INV_OUT + 0 NMOS + L=1.6u + W=3.2u M_U0_U7_1_U0_Q3 U0_U7_G0_0_0_L_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_U7_1_U0_Q20 U0_U7_G1_0_0_L_INV_OUT CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_U7_1_U0_Q15 U0_U7_G2_0_0_L_INV_OUT U0_K2O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_U7_1_U0_Q17 U0_U7_G2_0_0_H_INV_OUT U0_G2O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_U7_1_U0_Q4 U0_U7_1_U0_N02549 CLK VDD 5 PMOS + L=1.6u + W=12.8u M_U0_U7_1_U1_2_Q1 U0_G1_0_1_H_O_S U0_U7_G1_0_0_H_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U7_1_U1_2_Q2 U0_G1_0_1_H_O_S U0_U7_G1_0_0_H_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U7_1_U1_3_Q1 U0_G1_0_1_L_O_S U0_U7_G1_0_0_L_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U7_1_U1_3_Q2 U0_G1_0_1_L_O_S U0_U7_G1_0_0_L_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U7_1_U1_4_Q1 U0_G2_0_1_H_O_S U0_U7_G2_0_0_H_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U7_1_U1_4_Q2 U0_G2_0_1_H_O_S U0_U7_G2_0_0_H_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U7_1_U1_5_Q1 U0_G2_0_1_L_O_S U0_U7_G2_0_0_L_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U7_1_U1_5_Q2 U0_G2_0_1_L_O_S U0_U7_G2_0_0_L_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U7_1_U1_Q1 U0_G0_0_1_H_O_S U0_U7_G0_0_0_H_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U7_1_U1_Q2 U0_G0_0_1_H_O_S U0_U7_G0_0_0_H_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U7_1_U1_1_Q1 U0_G0_0_1_L_O_S U0_U7_G0_0_0_L_INV_OUT VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U7_1_U1_1_Q2 U0_G0_0_1_L_O_S U0_U7_G0_0_0_L_INV_OUT 0 0 NMOS + L=1.6u + W=3.2u M_U0_U22_Q1 U0_U22_N00876 U0_G3O_L_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_U22_Q5 U0_U22_N00876 U0_K4O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_U22_Q8 U0_U22_1_G7_0_H_INV U0_G7O_H_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_U22_Q6 U0_U22_1_G7_0_L_INV U0_G7O_L_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_U22_Q7 U0_U22_1_G7_0_H_INV U0_I8O_H_S U0_U22_N00840 0 NMOS + L=1.6u + W=3.2u M_U0_U22_Q4 U0_U22_1_G7_0_L_INV U0_I8O_L_S U0_U22_N00876 0 NMOS + L=1.6u + W=3.2u M_U0_U22_Q11 U0_U22_N00840 CLK VDD 5 PMOS + L=1.6u + W=9.6u M_U0_U22_Q12 U0_U22_N00876 CLK VDD 5 PMOS + L=1.6u + W=9.6u M_U0_U22_Q9 U0_U22_1_G7_0_H_INV CLK VDD 5 PMOS + L=1.6u + W=9.6u M_U0_U22_Q10 U0_U22_1_G7_0_L_INV CLK VDD 5 PMOS + L=1.6u + W=9.6u M_U0_U22_G70_h_Q1 U0_G7_0_0_H_O_S U0_U22_1_G7_0_H_INV VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U22_G70_h_Q2 U0_G7_0_0_H_O_S U0_U22_1_G7_0_H_INV 0 0 NMOS + L=1.6u + W=3.2u M_U0_U22_G70_l_Q1 U0_G7_0_0_L_O_S U0_U22_1_G7_0_L_INV VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U22_G70_l_Q2 U0_G7_0_0_L_O_S U0_U22_1_G7_0_L_INV 0 0 NMOS + L=1.6u + W=3.2u M_U0_U22_Q3 U0_U22_N00840 U0_G3O_H_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_U22_Q2 U0_U22_N00840 U0_G4O_S 0 0 NMOS + L=1.6u + W=3.2u M_U0_U1_1_Q8 U0_U1_1_N00079 A1_L U0_U1_1_N037282 0 NMOS + L=1.6u + W=3.2u M_U0_U1_1_Q20 U0_U1_1_N037321 B4_L 0 0 NMOS + L=1.6u + W=3.2u M_U0_U1_1_Q6 U0_U1_1_N00090 A2_L U0_U1_1_N00079 0 NMOS + L=1.6u + W=3.2u M_U0_U1_1_Q19 U0_U1_1_N00265 A4_L U0_U1_1_N037321 0 NMOS + L=1.6u + W=3.2u M_U0_U1_1_Q7 U0_U1_1_N00090 B2_L U0_U1_1_N00079 0 NMOS + L=1.6u + W=3.2u M_U0_U1_1_Q5 U0_U1_1_N00073 B2_L 0 0 NMOS + L=1.6u + W=3.2u M_U0_U1_1_Q18 U0_U1_1_N00265 CLK VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U1_1_Q4 U0_U1_1_N00090 A2_L U0_U1_1_N00073 0 NMOS + L=1.6u + W=3.2u M_U0_U1_1_Q3 U0_U1_1_N00069 B3_L 0 0 NMOS + L=1.6u + W=3.2u M_U0_U1_1_Q2 U0_U1_1_N00090 A3_L U0_U1_1_N00069 0 NMOS + L=1.6u + W=3.2u M_U0_U1_1_Q17 U0_G3O_L_S U0_U1_1_N00134 0 0 NMOS + L=1.6u + W=3.2u M_U0_U1_1_Q16 U0_H4O_L_S U0_U1_1_N00265 U0_G3O_L_S 0 NMOS + L=1.6u + W=3.2u M_U0_U1_1_Q10 U0_U1_1_N00134 A3_L U0_U1_1_N00090 0 NMOS + L=1.6u + W=3.2u M_U0_U1_1_Q11 U0_U1_1_N00134 B3_L U0_U1_1_N00090 0 NMOS + L=1.6u + W=3.2u M_U0_U1_1_Q12 U0_U1_1_N00134 CLK VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U1_1_Q13 U0_G3O_L_S U0_U1_1_N00134 VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U1_1_Q14 U0_H4O_L_S U0_U1_1_N00134 VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U1_1_Q1 VDD CLK_INV U0_U1_1_N00090 0 NMOS + L=1.6u + W=3.2u M_U0_U1_1_Q15 U0_H4O_L_S U0_U1_1_N00265 VDD 5 PMOS + L=1.6u + W=6.4u M_U0_U1_1_Q9 U0_U1_1_N037282 B1_L 0 0 NMOS + L=1.6u + W=3.2u V_Cin_h CIN_H 0 +PULSE 0 5 3ns 100p 100ps 3ns 6ns V_A5_l A5_L 0 +PULSE 0 5 0 100p 100ps 3ns 6ns V_CLK_INV CLK_INV 0 +PULSE 0 5 3ns 200p 200ps 3ns 6ns V_A6_l A6_L 0 +PULSE 0 5 0 100p 100ps 3ns 6ns V_Cin_l CIN_L 0 +PULSE 0 5 0 100p 100ps 3ns 6ns V_B8_l B8_L 0 +PULSE 0 5 3ns 100p 100ps 3ns 6ns V_A4_l A4_L 0 +PULSE 0 5 3ns 100p 100ps 3ns 6ns V_B7_l B7_L 0 +PULSE 0 5 0 100p 100ps 3ns 6ns V_A8_h A8_H 0 +PULSE 0 5 3ns 100p 100ps 3ns 6ns V_A3_h A3_H 0 +PULSE 0 5 0 100p 100ps 3ns 6ns V_B3_l B3_L 0 +PULSE 0 5 3ns 100p 100ps 3ns 6ns V_B7_h B7_H 0 +PULSE 0 5 3ns 100p 100ps 3ns 6ns V_B1_h B1_H 0 +PULSE 0 5 3ns 100p 100ps 3ns 6ns V_B6_h B6_H 0 +PULSE 0 5 0 100p 100ps 3ns 6ns V_A1_l A1_L 0 +PULSE 0 5 3ns 100p 100ps 3ns 6ns V_GPSEUDOH G-1_0_H_IN_SIG 0 +PULSE 0 5 3ns 100p 100ps 3ns 6ns V_GPSEUDOL G-1_0_L_IN_SIG 0 +PULSE 0 5 0 100p 100ps 3ns 6ns V_B8_h B8_H 0 +PULSE 0 5 0 100p 100ps 3ns 6ns V_A1_h A1_H 0 +PULSE 0 5 0 100p 100ps 3ns 6ns V_B1_l B1_L 0 +PULSE 0 5 0 100p 100ps 3ns 6ns V_V1 VDD 0 5VDC V_A3_l A3_L 0 +PULSE 0 5 3ns 100p 100ps 3ns 6ns V_A7_h A7_H 0 +PULSE 0 5 0 100p 100ps 3ns 6ns V_A6_h A6_H 0 +PULSE 0 5 3ns 100p 100ps 3ns 6ns V_CLK CLK 0 +PULSE 0 5 0ns 200p 200ps 3ns 6ns V_A7_l A7_L 0 +PULSE 0 5 3ns 100p 100ps 3ns 6ns V_A2_h A2_H 0 +PULSE 0 5 0 100p 100ps 3ns 6ns V_B6_l B6_L 0 +PULSE 0 5 3ns 100p 100ps 3ns 6ns V_B2_l B2_L 0 +PULSE 0 5 0 100p 100ps 3ns 6ns V_A8_l A8_L 0 +PULSE 0 5 0 100p 100ps 3ns 6ns V_B2_h B2_H 0 +PULSE 0 5 3ns 100p 100ps 3ns 6ns V_A4_h A4_H 0 +PULSE 0 5 0 100p 100ps 3ns 6ns V_B4_l B4_L 0 +PULSE 0 5 0 100p 100ps 3ns 6ns V_B4_h B4_H 0 +PULSE 0 5 3ns 100p 100ps 3ns 6ns V_A2_l A2_L 0 +PULSE 0 5 3ns 100p 100ps 3ns 6ns V_B3_h B3_H 0 +PULSE 0 5 0 100p 100ps 3ns 6ns V_A5_h A5_H 0 +PULSE 0 5 3ns 100p 100ps 3ns 6ns V_B5_l B5_L 0 +PULSE 0 5 0 100p 100ps 3ns 6ns V_B5_h B5_H 0 +PULSE 0 5 3ns 100p 100ps 3ns 6ns